Plasma display panels, or gas discharge panels, are well known in the art and, in general, comprise a structure including a pair of substrates respectively supporting column and row electrodes, each coated with a dielectric layer disposed in parallel spaced relation to define a gap therebetween in which an ionized gas is sealed. The substrates are arranged such that the electrodes are disposed in orthogonal relation to one another, thereby defining points of intersection which, in turn, define discharge pixel sites at which selective discharges may be established to provide a desired storage or display function. It is also known to operate such panels with AC voltages and particularly to provide a write voltage which exceeds the firing voltage at a given discharge site, as defined by selected column and row electrodes, thereby to produce a discharge at a selected cell. The discharge at a selected cell can be continuously "sustained" by applying an alternating sustain voltage (which, by itself, is insufficient to initiate a discharge). This technique relies upon wall charges generated on the dielectric layers of the substrates which, in conjunction with the sustain voltage, operate to maintain continuing discharges.
Details of the structure and operation of gas discharge panels or plasma displays are set forth in U.S. Pat. No. 3,559,190 issued Jan. 26, 1971 to Donald Bitzer, et al. and in U.S. Pat. No. 4,772,884 to Weber et al. issued Sep. 20, 1988.
Energy recovery sustainers have been developed for plasma display panels to enable recovery of energy used to charge and discharge the panel's capacitance. As AC plasma display panels have grown in size and operating voltage, the need to precisely control the turn-on of sustain signal drivers has become critical. Turning on sustain signal drivers too early results in lower efficiency and larger electromagnetic (EMI) emissions. Late turn-on results in premature gas discharges within the panel which adversely affects operating margins.
Because a sustain pulse's rise time is controlled by a resonant circuit comprising the sustainer's inductor and the display panel's capacitance, the rise time can vary considerably, based upon the number of ON and OFF pixel sites (i.e., the data content stored in the panel can cause a wide variation in the panel's capacitance). In sustain drivers which employ fixed timing circuits, this variability must be minimized by adding ballast capacitance, which increases power dissipation, or by adding complex capacitance compensation circuits.
The variable capacitance problem can only be solved by use of a variable timing circuit which is capable of turning on sustain driver circuits as the inductor concludes its resonant cycle. Prior art circuits have waited to turn on the sustain driver until the inductor's current goes to zero and reverses direction. This creates a "flyback" transition on the energy recovery side of the inductor which is used to trigger the turn-on of output drivers. With today's voltages and gas mixtures, the flyback occurs too late to be fully useful. The output driver must begin to turn on as the inductor current diminishes and well before a flyback current occurs.
Use of flyback current to control sustain output drivers has an unwanted side effect of drawing current out of the panel, while the output driver is turning on. This creates ringing currents throughout the system. The voltage flyback occurs on the recovery side of the inductor at the completion of the resonant cycle. The inductor voltage is opposite to that of the original applied forcing voltage. Flyback current flows to charge or discharge the capacitance on the recovery side of the inductor to match the panel voltage. In doing so, charge is transferred that is opposite to the desired transition, resulting in an increase in non-recoverable energy consumed by the circuit and a noisy transition as the output driver turns on.
Weber et al., in U.S. Pat. Nos. 4,866,349 and 5,081,400, disclose a power efficient sustain driver for an AC plasma panel. While, the disclosure of the Weber et al. patent is incorporated herein by reference, because the invention disclosed herein is a direct improvement of the Weber et al. design, details of that design will be hereafter described. The Weber et al. sustain driver circuit employs inductors in the charging and discharging of panel capacitances so as to recover a large percentage of energy theretofore lost in driving panel capacitances. FIGS. 1-4 hereof are directly taken from the Weber et al. patent.
FIG. 1 shows an idealized schematic of the Weber et al. sustain driver and FIG. 2 shows the output voltage and inductor current waveforms expected for the circuit of FIG. 1, as four switches S1, S2, S3, S4 are opened and closed through four successive switching states. It is to be understood that each idealized circuit shown hereafter is driven by a logic level control signal which has both a leading rising edge and a lagging falling edge. The means for connecting the source of the control signals to the driver circuit are only shown on the detailed circuit views.
It is assumed, prior to State 1, that recovery voltage Vss is at Vcc/2 (where Vcc is the sustain driver's power supply voltage), Vp is at zero, S1 and S3 are open, and S2 and S4 are closed. Capacitance Css must be much greater than Cp to minimize variation of Vss during States 1 and 3. The reason that Vss is at Vcc/2 will be explained, below, after the switching operation is explained.
State 1: At the leading, rising edge of an input sustain pulse, S1 closes, S2 opens, and S4 opens (S3 is open). With S1 closed, inductor L and Cp (which is the panel capacitance as seen from the sustain driver circuit) form a series resonant circuit, and a "forcing" voltage of Vss=Vcc/2 is applied thereto. Vp rises to Vcc (through action of inductor L), at which point I.sub.L has fallen to zero, and diode D1 becomes reverse biased.
State 2: S3 is closed to clamp Vp at Vcc and to provide a current path for any "ON" pixels in the panel. When a pixel is in the ON state, its periodic discharges provide a substantial short circuit across the ionized gas, with the current required to maintain the discharge supplied from Vcc. The discharge/conduction state of a pixel is represented by icon 10 in FIG. 1.
State 3: (occurs upon the falling lagging edge of the input sustain pulse); S2 closes, S1 opens, and S3 opens. With S2 closed, inductor L and capacitance Cp again form a series resonant circuit, with the voltage across inductor L equal to Vss=Vcc/2. However the polarity of the voltage is reverse to that in State 1, causing a negative flow of current I.sub.L. Vp then falls to ground as the stored energy in inductor L is dissipated, at which point I.sub.L has reached zero. D2 becomes reverse biased.
State 4: S4 is closed to clamp Vp at ground while an identical driver on the opposite side of the plasma panel drives the opposite side to Vcc and a discharge current then flows in S4 if any pixels are "ON".
It was assumed above that Vss remains stable at Vcc/2 during charging and discharging of Cp. The reasons for this are as follows. If Vss were less than Vcc/2, then on the rise of Vp, when S1 is closed, the forcing voltage would be less than Vcc/2. Subsequently, on the fall of Vp, when S2 is closed, the forcing voltage would be greater than Vcc/2. Therefore, on average, current would flow into Css. Conversely, if Vss were greater than Vcc/2, then on average, current would flow out of Css. Thus, the stable voltage at which the net current into Css is zero, is Vcc/2. In fact, on power up, as Vcc rises, if the driver is continuously switched through the four states explained above, then Vss will rise with Vcc to Vcc/2.
The circuit implementation of the idealized circuit of FIG. 1 is shown in FIG. 3 and the associated timing diagram is shown in FIG. 4. Transistors T1-T4 replace switches S1-S4, respectively. Driver 1 is used to control transistors T1 and T2 in a complementary fashion so that when T1 is on, T2 is off and vice-versa. Driver 2 uses the time constant of R1-C3 or the voltage rise at V1 to turn on transistor T4. Similarly, Driver 3 uses the time constant of R2-C4 or the voltage rise of V2 to turn on transistor T3. Diodes D3 and D4 are used to turn off transistors T3 and T4 quickly.
State 1: To start, T4 and T2 turn off, and T3 is off, waiting to be turned on by the R2-C4 time constant or the rise of V2 (all via diode DC2). An input sustain pulse transition from source 12 turns T1 on and Vss is applied to nodes V1, A, and V2. Inductor L and panel capacitance Cp form a series resonant circuit, which has a forcing voltage of Vss=Vcc/2. As a result of the stored energy in inductor L, Vp rises past Vss to Vcc, at which point I.sub.L goes to zero.
Since Vp typically rises to 80% of Vcc, inductor L thereafter sees a forcing voltage (from the panel side) of Vp minus Vss. Negative current I.sub.L now flows out of the panel, back through the inductor L, reverse biases D1 and charges the capacitance of T2. This is the current flyback previously mentioned and starts at time t1 in FIG. 4. The flyback current causes voltage flyback at A and V2 to rise sharply. As V2 rises, C4 couples this rise to trigger Driver 3 to turn on T3.
The panel voltage Vp drops as energy is taken out of the panel by the flyback current and put back into inductor L between times t1 and t2. This flyback energy is dissipated in T3, L, D2, and DC2.
State 2: T3 is turned on to clamp Vp at Vcc and to provide a current path for any discharging "ON" pixel. Since energy was put into inductor L, negative current I.sub.L continues to flow from T3, and through inductor L, diode D2, and diode DC2, until the energy is dissipated. All of the aforesaid components are low loss components so the current decay is slow.
State 3: T1 and T3 turn off, T4 remains off, and T2 turns on. Vp is approximately Vcc, as the panel capacitance Cp is fully charged. With T2 on, inductor L and panel capacitance Cp again form a series resonant circuit, having a forcing voltage across inductor L of Vss=Vcc/2. Vp then falls to ground, at which point I.sub.L is zero. Similar to the end of State 1, the forcing voltage due to the stored energy in inductor L is of reverse polarity, and D2 becomes reverse biased and discharges the capacitance of T1, pulling node V1 to ground, sharply. The flyback current I.sub.L occurs at time t3 and is coupled through C3 to Driver 2 which turns on T4.
State 4: T4 clamps Vp at ground while an identical driver on the opposite side of the panel drives the opposite side to Vcc and a discharge current then flows in T4 if any pixels are "ON".
The above design has a number of deficiencies:
1) At time t1, where Vp peaks before T3 turns on, gas discharge activity can begin. Since Vp is less than Vcc, any discharges will be weaker than desired, resulting in dim areas or flickering pixel sites. The discharge has an added affect of further pulling Vp down before T3 can turn on, thus reducing efficiency.
2) As operating voltages and panel capacitance increase, it becomes necessary to use large area mosfets due to the high currents required. The larger mosfets and higher voltages produce much greater flyback energy levels which must be dissipated during State 2. This is the leading cause for the output voltage drop between times t1 and t2. Since all components are designed for low losses, the inductor current flowing during State 2 continues to flow into State 3 and disturbs the sustainer's falling transition.
3) Stray inductance in the panel and interconnect wiring add considerable noise to the system during the turn-on of T3 and T4. Since the flyback action draws current from the panel and T3 sources current to pull up the output, the result is a large, fast current change in the panel which affects the entire ground system of the display, creating radiated Electromagnetic Interference (EMI).
4) Because R1 and R2 will turn on the output transistors, regardless of the resonant cycle, the circuit is capable of dissipating considerable power during fault conditions.